As time-to-market pressure increases, design engineers require advanced system-level products to ensure problem-free development and manufacturing. Programmable logic devices (PLDs) with in-system programmability (ISP) can help accelerate development time, facilitate in-field upgrades, simplify the manufacturing flow, lower inventory costs, and improve printed circuit board (PCB) testing capabilities.
Real-time ISP reduces maintenance costs by allowing users to program a device while the device is in operation. This feature enables quick in-field product updates without requiring the system to be turned off to initiate reconfiguration. Other than having the device going through a power cycle, the other method that forces the flash to SRAM download process to occur after the real-time ISP clears all registers in the device of any previously stored values and by default tri-states the I/O pins during the process. Thus, if it is desired to continue the new configuration with the previous register data, there is no technique currently available that would not interrupt the system.
As a result, there is a need to solve the problems of the prior art to provide a PLD capable of utilizing real-time in-system programmability in a manner that retains register data so that the system operation is not interrupted or otherwise impacted.